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gnucap:projects:nlnet:verilogams [2023/01/09 09:11] felixs 2a update |
gnucap:projects:nlnet:verilogams [2023/01/09 09:12] (current) felixs missing ] |
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| == a) Model overloading by name and parameter ranges according to standard. == | == a) Model overloading by name and parameter ranges according to standard. == | ||
| Verilog defines "paramset" as a means to replace model cards known from spice, cf. LRM section 6.4. | Verilog defines "paramset" as a means to replace model cards known from spice, cf. LRM section 6.4. | ||
| - | The standard essentially allows multiple prototypes by the same name with mutually different interfaces (see [[gnucap:manual:languages:verilog#paramset|usage]]), allowing things like [[gnucap:manual:examples:paramset_recursive|recursive models]]. This requires changes to the way device instances are read in and elaborated [[paramset_implementation|read in and elaborated]]. Preliminary code is available [[http://git.savannah.gnu.org/cgit/gnucap.git/log/?h=paramset-13|here]. Some of it has been added to [[https://codeberg.org/gnucap/gnucsator/src/branch/develop|Gnucsator]]. | + | The standard essentially allows multiple prototypes by the same name with mutually different interfaces (see [[gnucap:manual:languages:verilog#paramset|usage]]), allowing things like [[gnucap:manual:examples:paramset_recursive|recursive models]]. This requires changes to the way device instances are read in and elaborated [[paramset_implementation|read in and elaborated]]. Preliminary code is available [[http://git.savannah.gnu.org/cgit/gnucap.git/log/?h=paramset-13|here]]. Some of it has been added to [[https://codeberg.org/gnucap/gnucsator/src/branch/develop|Gnucsator]]. |
| == b) Implement preprocessor, support backtick, macros, conditionals. == | == b) Implement preprocessor, support backtick, macros, conditionals. == | ||
| == c) Add support for "attribute instance". == | == c) Add support for "attribute instance". == | ||